Preliminary Program - SForum 2014
- Technical Sessions Thursday, September 4th
Session 1 – Modeling I
Room: São Francisco
Chair: José Camargo da Costa
08:20-08:40
Behavior Investigation of Trench-Gate and Vertical Diffusion Power MOSFET
Fernando O. Dainese, Jefferson W. M. Santiago, Mario Kawano, Erick Pfeifer, Devair A. Arrabaça, Michele Rodrigues and
Milene Galeti
08:40-09:00
Comparative Study of Threshold Voltage Extraction Methods Applied to SOI nMOSFETs
Caroline P. A. Moraes and Michelly de Souza
09:00-09:20
3D Transistor Behavior from Room to Low Temperature
Carlos Augusto Bergfeld Mori, João Antonio Martino and Paula Ghedini Der Agopian
09:20-09:40
Optimization of Gated Lateral PIN Photodiodes
Renato Zapata, Carla Novo and Renato C. Giacomini
09:40-10:00
Influence of Ground-Plane Doping on Bulk FinFET
Leonardo Mattos Cavalheiro Silva, Paula G. D. Agopian and João Antonio Martino
Exhibitors (booths)
10:00-10:20
Coffee Break
10:20-10:40
Session 2 – Modeling II
Room: São Francisco
Chair: Salvador Gimenez
11:20-11:40
The Effect of Atmospheric Air in Flexible Organic Transistors
Andre F. S. Guedes, Vilmar P. Guedes and Simone Tartari
11:40-12:00
Current-Density Analysis of Three-Dimensional Planar Magnetic-Field Sensor
Rodrigo A. Silva, André L. Perin and Renato C. Giacomini
12:00-12:20
Microelectronics Education: Comparison of Two Different NMOS Process
Monique P. H. Sierra, Ricardo C. Rangel, Paula G. D. Agopian and João Antonio Martino
Lunch
12:20-14:00
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Friday, September 5th
Session 3 – Analog & RF
Room: São Francisco
Chair: Carlos Valderrama
08:20-08:40
Design of an 1.2V, 2.4GHz, LC-Tank Voltage-Controlled Oscillator
Polyana Camargo de Lacerda, João Paulo Perbiche, Oscar da C. Gouveia Filho and André Augusto Mariano
08:40-09:00
Design of a Lock-in Amplifier with Current-Mode Oscillator
Leonardo M. Cavalcanti and Edval J. P. Santos
09:00-09:20
Fixed-Point Radial Basis Function Neural Network for the Digital Baseband Predistortion of an RF Doherty Power Amplifier
André F. Zanella, Ricardo A. S. Cavalheiro, Caroline de França, Luiza B. C. Freire and Eduardo G. Lima
09:20-09:40
Automatic Design of Fully Differential Amplifiers with Common-Mode Feedback
Arthur Campos de Oliveira, Lucas Compassi Severo and Alessandro Gonçalves Girardi
09:40-10:00
Spatial Positioning of CMOS Structures Using Optical Position-Sensitive Detectors
Arthur R. Araújo, Carlos Felipe G. Souza, Maria Tereza C. Souza, Victor F. Muniz, Davies W. de Lima Monteiro and Luciana P.
Salles
Visit to Sponsors (Booths)
10:00-10:20
Coffee Break
10:20-10:40
Session 4 – Digital and Applications
Room: São Francisco
Chair: Oscar da Costa Gouveia
10:40-11:00
Routing Clos-Based Interconnection Networks for Post-Silicon Debug
Fredy A. M. Alves, Fernando A. D. Teixeira, André B. M. Gomes, Ricardo S. Ferreira and José Augusto M. Nacif
11:00-11:20
FPGA-Based Heterogeneous Architecture for Sequence Alignment
Xin Chang, Fernando A. Escobar and Carlos Valderrama
11:20-11:40
Temperature Fluctuation Effects on Performance of XOR Logic Gates
Fábio G. R. G. da Silva, Vagner S. Rosa, Cristina Meinhardt and Paulo F. Butzen
11:40-12:00
Hardware Design for HEVC-Based Adaptive Loop Filter
Ândrio Araújo, Ruhan Conceição, Bruno Zatt, Marcelo Porto and Luciano Agostini
12:00-12:20
Improving FlexMap Tool to Explore Preprocessing and Post-Processing Techniques
João Júnior da Silva Machado, Julio Saraçol Domingues Junior, Leomar Soares da Rosa Junior and Felipe de Souza Marques
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Lunch
12:20-14:00
SForum Poster Session
Room: Second Hall
Chair: José Nacif
8:20-12:20
Design Exploration for SHA-3 Algorithm in FPGAs
Florêncio Natan dos Santos Gama and Edward David Moreno
Low Cost Network for Internet of Things
Fernando Mendonça de Almeida, Admilson de Ribamar Lima Ribeiro and Marco Túlio Chella
Simulation of Protocol Stacks for Internet of Things
João Paulo Andrade Lima, Diego Assis Siqueira Gois and Admilson de Ribamar Lima Ribeiro
Integrating DSP and FPGA Evaluation Modules for Building High Performance Computing Platforms
Ilan Sousa and Aldebaro Klautau
Design of an ASK Demodulator and a Bandgap Reference for a Passive RFID Tag for 13,56MHz
José Alisson de Albuquerque Pinto, Marlon C. Portugal Filho, Pedro Henrique P. Ximenes, Wesley de Jesus Gomes and
Wellington A. do Amaral
Designing a Complete Pipelined Datapath to MIPS ISA: Learning in Pratice
Francisco Carlos Silva Junior, Ivan Saraiva, Laysson Oliveira Luz and Ramon S. Nepomuceno
Modeling Attacks on NoC-Based SoCs
Luiz Gustavo Metzger, Cesar Albenes Zeferino and Martha Johanna Sepúlveda Flórez
Reviewing AIG Equivalence Checking Approaches
Marcos Henrique Backes, Jody Maick Matos, Renato Perez Ribas and André Inácio Reis
Electrical Characterization of Lateral PIN Photodetector Diode
Peterson Nascimento and Michelly de Souza
An Implementation of AES Algorithm in FPGA
Isaac Nattan da Silva Palmeira, Alcir Cledson de Santana Góis, Wanderson Roger Azevedo Dias and Edward David Moreno
Envelope Tracking Power Amplifier in CMOS Technology for 4G LTE Wireless Communication Systems Handsets
Carolina Luiza Rizental Machado, Caroline de França and Eduardo Gonçalves de Lima
Design of a Telescopic Operational Amplifier using a Semi-Automatic Synthesis
Michael Douglas C. da Silva, Lucas Compassi Severo and Alessandro Gonçalves Girardi
Optical Equalization Analysis for Position-Sensitive-Detector of the Type Quad-Cell
Maria Tereza C. Souza, Victor Ferreira Muniz, Arthur R. Araújo, Carlos Felipe G. Souza, Davies W. de Lima Monteiro and
Luciana P. Salles
An Application of Reconfigurable Architectures to the Localization Problem in Mobile Robotics
Luis Contreras Samame, Sérgio Messias Cruz, J. M. S. T. Motta and Carlos Humberto Llanos Quintero
CTIA in Read-Out Integrated Circuit with PIN Photodetector
Artur S. B. de Mello, Pedro Vítor F. do Rosário, Luciana P. Salles, Lidiane C. Campos and Davies W. de Lima Monteiro
Visit to Sponsors (Booths)
10:00-10:20
3
Coffee Break
10:20-10:40
Lunch
12:20-14:00
Coffee Break
16:00-16:20
Best Papers & Closing Ceremony
16:20-17:00
4