Work in Progress
Session F1C
COMPUTER ARCHITECTURE EDUCATION: APPLICATION OF A NEW
LEARNING METHOD BASED ON DESIGN AND SIMULATOR
DEVELOPMENT
Carlos A. P. S. Martins 1 , Christiane V. Pousa 2 , Milene B. Carvalho 3 , Dulcinéia O. Penha 4
Abstract – In this paper we present an application of a new
learning method of computer architecture, based on design
and simulator development. Our main goals are to improve
and optimize the learning process.
Index Terms – computer architecture education, learning
method simulator development.
INTRODUCTION
We have been observing in the last years a significant
increase in the use and complexity of computational
systems, mainly in complexity of specification, design,
implementation, verification, programming and learning the
theory of these systems. In this work we analyze the
application of a new learning method of computer
architecture in many topics that improves the students
learning.
The method is based on design of architectural
constructive blocks (related with computer architecture
topics) and development of respective functional simulators.
The designs are verified using these functional simulators.
Discipline students develop the designs and simulators.
Our main goals are to improve and optimize the
learning process, motivating students to study and learn
topics of computer architecture, using design and simulators
development to construct and verify knowledge and develop
research activities during undergraduate disciplines as
learning instrument.
DESIGN AND S IMULATOR D EVELOPMENT
The applied learning method is based on constructivism,
problem based learning, group projects, design of didactic
architectural constructive blocks (using many abstraction
levels) as motivation for theory study/learning and
verification of designed constructive blocks through
functional simulators also developed by students [1]. We
apply this method with main topics of computer architecture
disciplines,
like
microprocessor
microarchitecture,
microprocessor instruction pipeline, instruction set
architecture, cache memory, and memory hierarchy.
To validate the proposed method we analyze the results
of its application in two undergraduate disciplines
(Computer Architecture I, Computer Architecture II) in
computer science graduation, PUC-Minas, Brazil. We
analyzed some architectural constructive blocks, which were
referenced, designed and its respective functional simulators
that were validated by the students of the undergraduate
disciplines. Some of these works were published in scientific
events [2][3][4].
CONCLUSIONS
The main contributions of this work are the improvement
and optimization of the learning process and development of
functional simulators.
Students approved the application of this learning
method, asserting that design of architectural constructive
blocks and verification using functional simulators motivate
and optimize learning. To professors the results are very
good, mainly the use of developed functional simulators to
verify constructive blocks designs and indirectly verify the
knowledge constructed, and improve motivation, interest,
creativity, learning and performance of students. Thus our
main goals were reached.
REFERENCES
[1]
Martins, Carlos A. P. S.; Corrêa, João B. T.; Góes, Luis F. W.; Ramos,
Luiz E. S.; Medeiros, Talles H. "A New Learning Method of
Microprocessor Architecture”, 32nd Frontiers in Education
Conference 2002-FIE 2002, Boston, 2002, pp. S1F 16-S1F 21.
[2]
Penha, Dulcineia O.; Carvalho, Milene B.; Martins, Carlos A. P. S.
"Design of a RISC Processor Dedicated to Multimedia Application",
II Workshop em Sistemas Computacionais de Alto Desempenho
WSCAD´2001, 2001, pp. 150-153. (in Portuguese)
[3]
Costa, Alexandra S.; Pousa, Christiane V.; Martins, Carlos A. P. S.
"Design and Development of a Cache Memory Simulator: functional
and performance analysis", III Workshop em Sistemas
Computacionais de Alto Desempenho WSCAD´2002, 2002, pp. 152153. (in Portuguese)
[4]
Martins, Carlos A. P. S.; Freitas, Henrique C. "Simulation Tool of
Network Processor for Learning Activities", 32nd Frontiers in
Education Conference 2002-FIE 2002, Boston, 2002, pp. S2F1-S2F 6.
1
Carlos Augusto Paiva da Silva Martins, Pontifical Catholic University of Minas Gerais (PUC-Minas), Computer Science Department and Graduate
Program in Electrical Engineering (PPGEE), Computational and Digital Systems Laboratory (LSDC), Belo Horizonte, MG, Brazil capsm@pucminas.br
2
Christiane Vilaça Pousa, PUC-Mi nas, Computer Science Department, LSDC, Belo Horizonte, MG, Brazil christ.bh@terra.com.br
3
Milene Barbosa Carvalho, PUC-Minas, PPGEE, LSDC, Belo Horizonte, MG, Brazil milenebarbosa@hotmail.com
4
Dulcinéia Oliveira da Penha, PUC-Minas, PPGEE, LSDC, Belo Horizonte, MG, Brazil dulcineia@pucmg.br
0-7803-7961-6/03/$17.00 © 2003 IEEE
November 5-8, 2003, Boulder, CO
33 rd ASEE/IEEE Frontiers in Education Conference
F1C-13
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work in progress - computer architecture education